From: Robert L. Doerr [rdoerr@bizserve.com]
Sent: Wednesday, July 24, 2002 10:32 AM
To: hero_owners@yahoogroups.com
Subject: Re: [hero_owners] RAM question

> Hi, I had 3 6264's in my Hero-1 ram expansion, but have now replaced
> it with 4 CDM6116's. My understand was that the 6264's were 8k ram
> chips and the 6116's were 16k chips.
>
> But I'm confused... I see here:
> http://www.ionpool.net/arcade/tech/staticram.html
>
> that 6264's are "64K (8K*8)
>
> and that 6116's are:
>
> 16k (2k*8)
>
> I'm confused. What are they, and what does 2k*8 mean?

Tom,

Most of the Static RAM chips and EPROM chips are rated for the
number of memory bits they have inside. the 6264 has 64K bits
of memory but is configured for byte wide access which means
it has 8K of 8bits. 8K times 8 = 64K. The 6116 chips are 16K
bits configured for byte wide access which is 2K of 8 bytes.

If a chip is rated at 2K x 4 then you would need a pair of them
to store 2K bytes of data since each chip only holds 4bits worth
of the 2K. There are some older RAM chips like this as well as
ones with only 1 bit per chip. That is why you see memory installed
as single chips or in banks of 2, 4, 8 ,etc. Many Dynamic RAM
chips have a similar numbering system.

> I have the basic rom and the automode rom in my hero, automode in U2
> and basic in U7. The four sockets U3-U6 are filled with CDM6116's.

Pull out all of the 6116 chips and replace them with the 6264 chips
or the Dallas 1225 NVRAM chips! You may want also want to install a
Utiltiy/DEMO ROM in U3 instead of an 8K Static RAM chip. There
really is no reason to use the 6116 chips in any of the HERO robots.

I have all of the ROM and RAM chips on hand if you need them.

> I can successfully write to memory locations 2000-9FFF. This is
> only 32k of memory, however didnt I just install 4 16k ram chips or
> 4 2k ram chips? I realize I can only address 32k in that range, but
> why do these chips work?

They will work but your memory is no longer contiguous and you
are missing chunks. What you currently have is 8k spread across
four 8K banks. You are using the 1st 2K of each 8K bank. What
is happening is that the 2K chip is actually appearing 4 times
in each bank. For a byte you write to $2001 you can read it at
$2001, $2801, $3001, and $3801. So, if you write a $34 at location
$2001 and later write a $63 at $3801 you will trash the value you
stored at $2001 since they are the same value!! This happens since
the extra address bits to select the other addresses within the
bank are ignored. Now, if the addressing PAL was customized to
know that the are only 2K chips then it could compensate and limit
the access just to 2K per bank.

If you really need more memory than the 32K + 4k (on main board)
then you need to look at bank switching one or more of the memory
chips. In that case you have multiple chips located at the same
address but use an I/O port to select which one is active at any
given time.

I hope all this makes sense. If you need any more clarification
or need a better example let me know.

Regards,

Robert